Rev. 6.00, 08/04, page 239 of 628
Block Diagram
Figure 9.1 shows a block diagram of timer A.
φ
W
PSW
Internal data bus
PSS
[Legend]
1/4
TMA
TCA
φ
/8192,
φ
/4096,
φ
/2048,
φ
/512,
φ
/256,
φ
/128,
φ
/32,
φ
/8
IRRTA
+
8
*
+
64
*
+
128
*
+
256
*
φ
W
/4
φ
W
/128
TMA:
TCA:
IRRTA:
PSW:
PSS:
Note:
*
Can be selected only when the prescaler W output (
φ
W
/128) is used as the TCA input clock.
Timer mode register A
Timer counter A
Timer A overflow interrupt request flag
Prescaler W
Prescaler S
φ
Figure 9.1 Block Diagram of Timer A
Summary of Contents for H8/38024 Series
Page 18: ...Rev 6 00 08 04 page xviii of xxx...
Page 30: ...Rev 6 00 08 04 page xxx of xxx...
Page 130: ...Rev 6 00 08 04 page 100 of 628...
Page 216: ...Rev 6 00 08 04 page 186 of 628...
Page 416: ...Rev 6 00 08 04 page 386 of 628...
Page 432: ...Rev 6 00 08 04 page 402 of 628...
Page 468: ...Rev 6 00 08 04 page 438 of 628...
Page 661: ...H8 38024 H8 38024S H8 38024F ZTAT H8 38124 Group Hardware Manual...