Rev. 6.00, 08/04, page 572 of 628
PMR5—Port Mode Register 5
H'CC
I/O Port
Bit
Initial value
Read/Write
7
WKP
7
0
R/W
6
WKP
6
0
R/W
5
WKP
5
0
R/W
3
WKP
3
0
R/W
0
WKP
0
0
R/W
2
WKP
2
0
R/W
1
WKP
1
0
R/W
4
WKP
4
0
R/W
0
Functions as P5
n
I/O pin
(n = 7 to 0)
P5
n
/WKP
n
/SEG
n+1
Pin Function Switch
1
Functions as
WKP
n
input pin
PWCR2—PWM2 Control Register
H'CD
10-Bit PWM
Clock Select
0
1
0
1
The input clock is
φ
(t
φ
*
1
= 1/
φ
) The conversion period is 512/
φ
,
with a minimum modulation width of 1/2
φ
The input clock is
φ
/2 (t
φ
*
1
= 2/
φ
) The conversion period is 1,024/
φ
,
with a minimum modulation width of 1/
φ
The input clock is
φ
/4 (t
φ
*
1
= 4/
φ
) The conversion period is 2,048/
φ
,
with a minimum modulation width of 2/
φ
The input clock is
φ
/8 (t
φ
*
1
= 8/
φ
) The conversion period is 4,096/
φ
,
with a minimum modulation width of 4/
φ
Notes: 1. t
φ
: Period of PWM2 input clock
2. 1 on products other than the H8/38124 Group
0
1
Bit
Initial value
Read/Write
7
1
6
1
5
1
3
1
0
PWCR20
0
W
2
PWCR22
0
*
2
R/W
1
PWCR21
0
W
4
1
0
10-bit PWM
PWH Output Select (H8/38124 Group only)
1
Event counter PWM
Summary of Contents for H8/38024 Series
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Page 661: ...H8 38024 H8 38024S H8 38024F ZTAT H8 38124 Group Hardware Manual...