Renesas H8/38024 Series, Hardware Manual

Page: 597 / 661

Rev. 6.00, 08/04, page 567 of 628
AMR—A/D Mode Register H'C6 A/D Converter
Bit
Initial value
Read/Write
7
CKS
0
R/W
6
TRGE
0
R/W
4

1

3
CH3
0
R/W
0
CH0
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
Channel Select
No channel selected
Bit 3
0
Bit 2
Analog Input Channel
*
: Don't care
CH3 CH2
0
CH1 CH0
Bit 1 Bit 0
0 AN
1
1
0
1
1 0 0
External Trigger Select
0 Disables start of A/D conversion by external trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin
ADTRG
5

1

4
AN
5
AN
6
AN
* *
1 1 Do not specify this
combination
7
* *
1 0 0
1
1 0
1
AN
0
AN
1
AN
2
AN
3
Clock Select
62/
φ
Bit 7
0
Conversion Period CKS
31/
φ
1
62
µ
s
φ
= 1 MHz
31
µ
s
12.4
µ
s
φ
= 5 MHz
 *
7.8
µ
s
φ
= 8 MHz
 *
Conversion Time
Note:
*
Other than H8/38124 Group, operation is not guaranteed with
a conversion time of less than 12.4
µ
s.
Select a setting that gives a conversion time of at least 12.4
µ
s.
In the case of H8/38124 Group, select a setting that gives
a conversion time of at least 7.8
µ
s.