Renesas H8/38024 Series, Hardware Manual

Page: 53 / 661

Rev. 6.00, 08/04, page 23 of 628
Pin No.
Type Symbol
FP-80A
TFP-80C
FP-80B TLP-85V
Pad
No.
* 1
Pad
No.
* 2
Pad
No.
* 3
I/O Name and Functions
I/O ports P8
7
to
P8
0
44 to 37 46 to 39 H9, J9
H10, J10
K8, K9
H8, K7
45 to
38 46 to
39 44 to
37 I/O Port 8: This is an 8-bit I/O
port. Input or output can
be designated for each bit
by means of port control
register 8 (PCR8).
P9
5
to
P9
0
59 to 54 61 to 56 B10, C8
D10, C9
D9, E10
60 to
55 61 to
56 59 to
54 Output Port 9: This is a 6-bit
output port. If the on-chip
emulator is used, pin 95 is
reserved for the emulator
and not available to the
user. In the case of the
F-ZTAT version, pin 95
should not be left open in
the user mode, and
should instead be pulled
up to high level.
PA
3
to
PA
0
45 to 48 47 to 50 G10
G8
G9
F10
46 to
49 47 to
50 45 to
48 I/O Port A: This is a 4-bit I/O
port. Input or output can
be designated for each bit
by means of port control
register A (PCRA).
PB
7
to
PB
0
80 to 73 2, 1,
80 to 75 A3, A2
C3, A4
B3, B4
A5, C4 81 to
74 1,
81 to
75 80 to
73 Input Port B: This is an 8-bit
input port.
RXD
32
70 72 B5 71 72 70 Input SCI3 receive data input:
This is the SCI3 data
input pin. Serial
communi-
cation
(SCI)
TXD
32
71 73 B6 72 73 71 Output SCI3 transmit data
output: This is the SCI3
data output pin.
SCK
32
69 71 C6 70 71 69 I/O SCI3 clock I/O: This is
the SCI3 clock I/O pin.
A/D
converter AN
7
to
AN
0
80 to 73 2, 1,
80 to 75 A3, A2
C3, A4
B3, B4
A5, C4 81 to
74 1,
81 to
75 80 to
73 Input Analog input channels 7
to 0: These are analog
data input channels to the
A/D converte.
ADTRG
3 5 B2 3 4 3 Input A/D converter trigger
input: This is the external
trigger input pin to the A/D
converter.