Nuvoton NUC970 series, Technical Reference Manual

Page: 157 / 1251

NUC970 Technical Reference Manual
Publication Release Date: Dec. 15, 2015
- 157 - Revision V1.30
NUC97
0
T
E
CHNIC
A
L
RE
F
E
RE
N
CE
MA
NUA
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APB Devices Clock Enable Control Register 0 (CLK_PCLKEN0)
Register Offset R/W Description Reset Value
CLK_PCLKEN0 0x018 R/W APB Devices Clock Enable Control Register 0 0x0000_0000
31 30 29 28 27 26 25 24
Reserved UART10 UART9 UART8
23 22 21 20 19 18 17 16
UART7 UART6 UART5 UART4 UART3 UART2 UART1 UART0
15 14 13 12 11 10 9 8
Reserved TIMER4 TIMER3 TIMER2 TIMER1 TIMER0
7 6 5 4 3 2 1 0
ETIMER3 ETIMER2 ETIMER1 ETIMER0 GPIO RTC WWDT WDT
Bits Description
[31:27]
Reserved
Reserved.
[26] UART10
UART 10 Clock Enable
0 = UART 10 clock disabled.
1 = UART 10 clock enabled.
[25]
UART9
UART 9 Clock Enable
0 = UART 9 clock disabled.
1 = UART 9 clock enabled.
[24]
UART8
UART 8 Clock Enable
0 = UART 8 clock disabled.
1 = UART 8 clock enabled.
[23]
UART7
UART 7 Clock Enable
0 = UART 7 clock disabled.
1 = UART 7 clock enabled.
[22] UART6
UART 6 Clock Enable
0 = UART 6 clock disabled.
1 = UART 6 clock enabled.
[21] UART5
UART 5 Clock Enable
0 = UART 5 clock disabled.
1 = UART 5 clock enabled.
[20] UART4
UART 4 Clock Enable
0 = UART 4 clock disabled.
1 = UART 4 clock enabled.