NUC970 Technical Reference Manual
Publication Release Date: Dec. 15, 2015
- 521 -
Revision V1.30
NUC97
0
T
E
CHNIC
A
L
RE
F
E
RE
N
CE
MA
NUA
L
data line
stable;
data valid
change
of data
allowed
SCL
SDA
Figure 5.18-5 Bit transfer on the I
2
C-bus
1
2
8
9
SCL FROM
MASTER
DATA OUTPUT BY
TRANSMITTER
DATA OUTPUT BY
RECEIVER
S
START
condition
Clock pulse for
acknowledgement
not acknowledge
acknowledge
Figure 5.18-6 Acknowledge on the I
2
C-bus
Data transfer on the I
2
C bus
5.18.5.6
The following figure shows a master transmits data to slave. A master addresses a slave with a 7-
bit address and 1-bit write index to denote that the master wants to transmit data to the slave. The
master keeps transmitting data after the slave returns acknowledge to the master.
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
‘0’ : write
S
SLAVE ADDRESS
R/W
A
DATA
A
DATA
A/A
P
from master to slave
from slave to master
data transfer
(n bytes + acknowlegde)
Figure 5.18-7 Master Transmits Data to Slave