NUC970 Technical Reference Manual
Publication Release Date: Dec. 15, 2015
- 613 -
Revision V1.30
NUC97
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CHNIC
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EMAC n CAM 15 Least Significant Word Register (EMACn_CAM15L)
The EMAC is equipped with 16 CAM entries. In these 16 CAM entries, 13 entries (entry 0~12) are
to keep destination MAC address for packet recognition, and the other 3 entries (entry 13~15) are
for PAUSE control frame transmission. Each CAM entry consists of 6 bytes. Consequently, 2
register are used for each CAM entry.
For packet recognition, a register pair {EMACn_CAMxM, EMACn_CAMxL} represents a CAM
entry and can keep a destination MAC address. The corresponding CAM enable bit CAMxEN
(EMACn_CAMEN[x]) is also needed be enabled. The x can be the 0 to 12.
The register pairs {EMACn_CAM13M, EMACn_CAM13L}, {EMACn_CAM14M, EMACn_CAM14L}
and {EMACn_CAM15M, EMACn_CAM15L} are used for flow control function.
Register
Offset
R/W Description
Reset Value
EMACn_CAM15L
n=0,1
E0x084 R/W EMAC n CAM 15 Least Significant Word Register
0x0000_0000
31
30
29
28
27
26
25
24
Operand
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
Bits
Description
[31:24]
Operand
Pause Parameter
In the PAUSE control frame, an operand field defined and controls how much time the
destination Ethernet MAC Controller paused. The unit of the operand is a slot time, the
512 bits time.
[23:0]
Reserved
Reserved.