Nuvoton NUC970 series, Technical Reference Manual, Page: 492 / 1251

NUC970 Technical Reference Manual
Publication Release Date: Dec. 15, 2015
- 492 - Revision V1.30
NUC97
0
T
E
CHNIC
A
L
RE
F
E
RE
N
CE
MA
NUA
L
SC Alternate Control Register (SC_ALTCTL)
Register Offset R/W Description Reset Value
SC_ALTCTL
x=0,1
0x008 R/W SC Alternate Control Register 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved OUTSEL
15 14 13 12 11 10 9 8
ACTSTS2 ACTSTS1 ACTSTS0 RXBGTEN ADACEN Reserved INITSEL
7 6 5 4 3 2 1 0
CNTEN2 CNTEN1 CNTEN0 WARSTEN ACTEN DACTEN RXRST TXRST
Bits Description
[31:17] Reserved Reserved.
[16] OUTSEL
Smartcard Data Pin Output Mode Selection
Use this bit to select smartcard data pin (SC_DATA) output mode.
0 = Quasi mode.
1 = Open-drain mode.
[15] ACTSTS2
Internal Timer2 Active State (Read Only)
This bit indicates the timer counter status of timer2.
0 = Timer2 is not active.
1 = Timer2 is active.
[14] ACTSTS1
Internal Timer1 Active State (Read Only)
This bit indicates the timer counter status of timer1.
0 = Timer1 is not active.
1 = Timer1 is active.
[13]
ACTSTS0
Internal Timer0 Active State (Read Only)
This bit indicates the timer counter status of timer0.
0 = Timer0 is not active.
1 = Timer0 is active.
[12] RXBGTEN
Receiver Block Guard Time Function Enable Bit
0 = Receiver block guard time function Disabled.
1 = Receiver block guard time function Enabled.