Mitsubishi L26CPU-BT, User Manual, Page: 377 / 450

App - 13 App - 13
APPENDIXES
Example) When the local station where expanded cyclic setting has been made and the remote I/O stations
where remote I/O station points setting has been made are connected
Remote I/O station
(Station number 4,
Occupies 1 station,
Remote I/O station point
setting: 8-point setting)
Remote I/O station
(Station number 3,
Occupies 1 station,
Remote I/O station point
setting: 8-point setting)
Master station
Local station
(Station number 1,
Occupies 2 stations,
Expanded cyclic setting:
octuple)
Buffer memory name Value Description
Station No. 1 RX offset 4000
H
Head buffer memory address of RX of station No. 1
Station No. 1 RX size 24 (18
H
) 384 (number of RX points) / 16 = 24 words
Station No. 2 RX offset 4000
H
As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 2 RX size 0 (default) As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 3 RX offset 4018
H
Head buffer memory address of RX of station No. 3
Station No. 3 RX size 1 (1
H
)
Though the lower 8 bits of the buffer memory address 4018
H
are the corresponding size of
RX of station No. 3, 1 is stored since less than 1 word is rounded up.
Station No. 4 RX offset 4018
H
Head buffer memory address of RX of station No. 4
Station No. 4 RX size 1 (1
H
)
Though the upper 8 bits of the buffer memory address 4018
H
are the corresponding size of
RX of station No. 4, 1 is stored since less than 1 word is rounded up.
Station No. 1 RY offset 4200
H
Head buffer memory address of RY of station No. 1
Station No. 1 RY size 24 (18
H
) 384 (number of RY points) / 16 = 24 words
Station No. 2 RY offset 4000
H
As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 2 RY size 0 (default) As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 3 RY offset 4218
H
Head buffer memory address of RY of station No. 3
Station No. 3 RY size 1 (1
H
)
Though the lower 8 bits of the buffer memory address 4218
H
are the corresponding size of
RY of station No. 3, 1 is stored since less than 1 word is rounded up.
Station No. 4 RY offset 4218
H
Head buffer memory address of RY of station No. 4
Station No. 4 RY size 1 (18
H
)
Though the upper 8 bits of the buffer memory address 4218
H
are the corresponding size of
RY of station No. 4, 1 is stored since less than 1 word is rounded up.
Station No. 1 RWw offset 4400
H
Head buffer memory address of RWw of station No. 1
Station No. 1 RWw size 64 (40
H
) 2 (number of occupied stations) 32 (expanded cyclic setting) = 64
Station No. 2 RWw offset 4400
H
As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 2 RWw size 0 (default) As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 3 RWw offset 4440
H
Head buffer memory address of RWw of station No. 3
Station No. 3 RWw size 0 (default) Buffer memory size of RWw of station No. 3
Station No. 4 RWw offset 4440
H
Head buffer memory address of RWw of station No. 4
Station No. 4 RWw size 0 (default) Buffer memory size of RWw of station No. 4
Station No. 1 RWr offset 4C00
H
Head buffer memory address of RWr of station No. 1
Station No. 1 RWr size 64 (40
H
) 2 (number of occupied stations) 32 (expanded cyclic setting) = 64
Station No. 2 RWr offset 4C00
H
As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 2 RWr size 0 (default) As 2 stations are occupied, the area of station No. 1 is checked.
Station No. 3 RWr offset 4C40
H
Head buffer memory address of RWr of station No. 3
Station No. 3 RWr size 0 (default) Buffer memory size of RWr of station No. 3
Station No. 4 RWr offset 4C40
H
Head buffer memory address of RWr of station No. 4
Station No. 4 RWr size 0 (default) Buffer memory size of RWr of station No. 4