Mitsubishi Electric MELSEC iQ-R CC-Link IE TSN, User Manual

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1 FUNCTIONS
1.1 Cyclic Transmission
35
1
Cyclic data assurance
This function assures the cyclic data assurance in units of 32 bits or station-based units.

: Assured,

: Not assured
When a remote station is in the network, use station-based block data assurance. If it is disabled, the
functions of the remote station cannot be assured.
32-bit data assurance
RWr, RWw, and LW data can be assured in 32-bit units.
■ Data assurance at the time of direct access to link devices
When link refresh target devices are accessed, the 32-bit data can be assured by satisfying the following conditions:
• The start device number of RWr, RWw, and LW is a multiple of 2
• The number of points assigned to RWr, RWw, and LW is a multiple of 2.
■
Data assurance at the time of access to buffer memory
The 32-bit data can be assured by satisfying the following conditions:
• Access using the DMOV instruction
• The start address of the buffer memory is a multiple of 2.
Method Description Link refresh Direct access to
link devices Access to buffer
memory
32-bit data assurance Assures data in 32-bit units.
Data is automatically assured by satisfying
assignment conditions of link devices.   
Station-based block data
assurance Assures data in station-based units.
Data is assured by enabling the station-based
block data assurance in the parameter setting.   
Interlock program Assures data of more than 32 bits.
Data is assured by configuring interlocks on
programs.
  
0H
1H
2H
3H
4H
5H
6H
7H
RWr, RWw, LW
RJ71GN11-T2
2 words
(32 bits)
Device
CPU module
Link refresh
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
0H
1H
2H
3H
4H
5H
6H
7H
DMOV K100 G10
RJ71GN11-T2
2 words
(32 bits)
Buffer memory
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
DMOV instruction
U0\