13-2
3.3V TOLERANT SIGNAL QUALITY SPECIFICATIONS
13.2.
RINGBACK SPECIFICATION
Ringback refers to the amount of reflection seen after a signal has undergone a transition. The
ringback specification is the voltage that the signal rings back to after achieving its farthest ex-
cursion. See Figure 13-1 for an illustration of ringback. Excessive ringback can cause false sig-
nal detection or extend the propagation delay. The ringback specification applies to the input pin
of each receiving agent. Violations of the signal Ringback specification are not allowed under
any circumstances.
Ringback can be simulated with or without the input protection diodes that can be added to the
input buffer model. However, signals that reach the clamping voltage should be evaluated fur-
ther. See Table 13-1 for the signal ringback specifications for Non-GTL+ signals.
Figure 13-1. 3.3V Tolerant Signal Overshoot/Undershoot and Ringback
Table 13-1. Signal Ringback Specifications
Transition
Maximum Ringback (with input diodes present)
0
→
1
2.5V
1
→
0
0.8V
.
Settling Limit
Rising-edge
Ringback
Falling-edge
Ringback
Undershoot
Overshoot
V
SS
Time
3.3V
Settling Limit
V
HI
=
V
LO
Summary of Contents for Pentium Pro Family
Page 17: ...1 Component Introduction ...
Page 26: ...2 Pentium Pro Processor Architecture Overview ...
Page 27: ......
Page 36: ...3 Bus Overview ...
Page 62: ...4 Bus Protocol ...
Page 105: ...5 Bus Transactions and Operations ...
Page 126: ...6 Range Registers ...
Page 131: ...7 Cache Protocol ...
Page 135: ...8 Data Integrity ...
Page 148: ...9 Configuration ...
Page 161: ...10 Pentium Pro Processor Test Access Port TAP ...
Page 172: ...11 Electrical Specifications ...
Page 201: ...12 GTL Interface Specification ...
Page 229: ...13 3 3V Tolerant Signal Quality Specifications ...
Page 233: ...14 Thermal Specifications ...
Page 239: ...15 Mechanical Specifications ...
Page 241: ...15 2 MECHANICAL SPECIFICATIONS s Figure 15 1 Package Dimensions Bottom View ...
Page 252: ...16 Tools ...
Page 260: ...16 8 TOOLS Figure 16 4 Generic MP System Layout for Debug Port Connection ...
Page 264: ...17 OverDrive Processor Socket Specification ...
Page 290: ...A Signals Reference ...
Page 320: ...Index ...
Page 328: ......