Intel Pentium Pro Family, Developer'S Manual, Page: 44 / 328

3-8
BUS OVERVIEW
•
Read and write multiple 8-byte spans.
•
Read a cache line and invalidate it in other caches.
•
Invalidate a cache line in other caches.
•
I/O read and write.
•
Interrupt Acknowledge (requiring a 1 byte interrupt vector).
•
Special transactions are used to send various messages on the bus. The special transaction
for the Pentium Pro processor are:
— Shutdown
— Flush
— Halt
— Sync
— Flush Acknowledge
— Stop Clock Acknowledge
— SMI Acknowledge
— Branch trace message (providing an 8-byte branch trace address)
•
Deferred reply to an earlier read or write that received a deferred response.
Specific descriptions of each transaction can be found in Chapter 5, Bus Transactions and
Operations.
3.3.4. Data Transfers
The Pentium Pro processor bus distinguishes between memory and I/O transactions.
Memory transactions are used to transfer data to and from memory. Memory transactions ad-
dress memory using the full width of the address bus. The Pentium Pro processor can address
up to 64 Gbytes of physical memory.
I/O transactions are used to transfer data to and from the I/O address space. The Pentium Pro
processor limits I/O accesses to a 64K + 3 byte I/O address space. I/O transactions use A[16:3]#
to address I/O ports and always deassert A[35:17]#. A16# is zero except when the first three
bytes above the 64KByte address space are accessed (I/O wraparound). This is required for com-
patibility with previous Intel processors.
The Pentium Pro processor bus distinguishes between different transfer lengths.