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BUS PROTOCOL
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A response that does not require the data bus (no data response, deferred response, retry
response, or hard failure response) may be driven even if DBSY# is active due to a
previous transaction.
On observation of active RS[2:0]# response, the Transaction Queues are updated and {rcnt} is
decremented.
4.6.
DATA PHASE
4.6.1.
Data Phase Overview
During the Data Phase, data is transferred between different bus agents. Data transfer responsi-
bilities are negotiated between bus agents as the transaction proceeds through various phases.
Based on the Request Phase, a transaction either contains a “request-initiated” (write) data trans-
fer, a “response-initiated” (read) data transfer, or no data transfer. On a modified hit during the
Snoop Phase, a “snoop-initiated” data transfer may be added to the request or substituted from
the response in place of the “response-initiated” data transfer. On a deferred completion re-
sponse in the Response Phase, “response-initiated” data transfer is deferred.
4.6.1.1.
BUS SIGNALS
The bus signals driven in this phase are D[63:0]#, DEP[7:0]#, DRDY#, and DBSY#.
All Data Phase signals are bused.
4.6.2.
Data Phase Protocol Description
4.6.2.1.
SIMPLE WRITE TRANSFER
Figure 4-18 shows a simple write transaction (request-initiated data transfer). Note that the data
is transferred before the response is driven.
Summary of Contents for Pentium Pro Family
Page 17: ...1 Component Introduction ...
Page 26: ...2 Pentium Pro Processor Architecture Overview ...
Page 27: ......
Page 36: ...3 Bus Overview ...
Page 62: ...4 Bus Protocol ...
Page 105: ...5 Bus Transactions and Operations ...
Page 126: ...6 Range Registers ...
Page 131: ...7 Cache Protocol ...
Page 135: ...8 Data Integrity ...
Page 148: ...9 Configuration ...
Page 161: ...10 Pentium Pro Processor Test Access Port TAP ...
Page 172: ...11 Electrical Specifications ...
Page 201: ...12 GTL Interface Specification ...
Page 229: ...13 3 3V Tolerant Signal Quality Specifications ...
Page 233: ...14 Thermal Specifications ...
Page 239: ...15 Mechanical Specifications ...
Page 241: ...15 2 MECHANICAL SPECIFICATIONS s Figure 15 1 Package Dimensions Bottom View ...
Page 252: ...16 Tools ...
Page 260: ...16 8 TOOLS Figure 16 4 Generic MP System Layout for Debug Port Connection ...
Page 264: ...17 OverDrive Processor Socket Specification ...
Page 290: ...A Signals Reference ...
Page 320: ...Index ...
Page 328: ......