CM_a
PRCM
CM_b
Module 1
Module 2
CLK1
FCLK1
ICLK1
LEGEND
Clock signal
Clock domains
Clock gating
Clock manager
CM
Clock gating control
Preliminary
Introduction
www.ti.com
Table 14-6. Module Clock Enabling Condition (continued)
Condition:
Clock Enabling Condition
AND
OR
Clock associated with IDLE protocol, as
Clock domain is ready
Idle status = FUNCT
functional clock
Idle status = TRANS
Idle status = IDLE
SWakeup is asserted
Optional clock
Clock domain is ready
OptFclken=Enabled ('1')
14.1.3 Clock Domain
A clock domain is a group of modules fed by clock signals controlled by the same clock manager in the
PRCM module (see
). By gating the clocks in a clock domain, the clocks to all the modules
belonging to that clock domain can be cut to lower their active power consumption (that is, the device is
on and the clocks to the modules are dynamically switched to ACTIVE or INACTIVE (GATED) states).
Thus, a clock domain allows control of the dynamic power consumption of the device. The device is
partitioned into multiple clock domains, and each clock domain is controlled by an associated clock
manager within the PRCM module. This allows the PRCM module to individually activate and gate each
clock domain of the device.
Figure 14-2. Generic Clock Domain
is an example of two clock managers: CM_a and CM_b. Each clock manager manages a
clock domain. The clock domain of CM_b is composed of two clocks: a functional clock (FCLK2) and an
interface clock (ICLK1), while the clock domain of CM_a consists of a clock (CLK1) that is used by the
module as a functional and interface clock. The clocks to Module 2 can be gated independently of the
clock to Module 1, thus ensuring power savings when Module 2 is not in use. The PRCM module lets
software check the status of the clock domain functional clocks. The
CM_<Clock_domain>_CLKSTCTRL[x] CLKACTIVITY_<FCLK/Clock name_FCLK> bit in the PRCM
module identifies the state of the functional clock(s) within the clock domain.
shows the
possible states of the functional clock.
Table 14-7. Clock Domain Functional Clock States
CLKACTIVITY Bit
Status
Description
0
Gated
The functional clock of the clock domain is inactive
1
Active
The functional clock of the clock domain is running
1400Power, Reset, and Clock Management (PRCM) Module
SPRUGX9 – 15 April 2011
© 2011, Texas Instruments Incorporated
Содержание TMS320C6A816 Series
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