Copyright © Siemens AG 2016. All rights reserved
374
ERTEC 200P-2 Manual
Technical data subject to change
Version 1.0
If SD_CONTROL.SD1/2_ENABLE = '1', filtering and differentiation are over the ERTEC
die. With SD_CONTROL.SD1/2_MUX, you can select the GPIO over which the SD signal
of a given port is received. A logical '0' can also be forced in place of the SD input signal
for SW control of the SD signal when SD_CONTROL.SD1/2_MUX = 96…112. A logical
'1' is used when SD_CONTROL.SD1/2_MUX = 113…127.
Note:
When SD_CONTROL.SD1/2_MUX = 16…31, there is differentiation but generally no
filtering (see 2.3.10.1 and 2.3.10.8.3)
.
G
P
IO
x
S
D
-
S
D
+
S
D
-
S
D
+
For external wiring over GPIO, see 4.6.2.2.2.
2.3.10.9.22 Address Mapping
Start-
Address
End-
Address
Modul/Memory-Name
0h
C4h SCRB
Module
Register/Memory
Read
Write
Address
/SCRB
ID_REG
r
0h
BOOT_REG
rh
4h
CONFIG_REG
rh
(w)
8h
ASYN_RES_CTRL_REG
rh
w
Ch
SYN_RES_CTRL_REG
r
w
10h
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