24.2.3
DADRy Format Select Register (DADPR) ............................................................................................ 813
24.3
Operation ......................................................................................................................................................... 814
24.4
Usage Notes .................................................................................................................................................... 815
24.4.1
Module Stop Function Setting................................................................................................................ 815
24.4.2
Operation of the D/A Converter in Module Stop State .......................................................................... 815
24.4.3
Operation of the D/A Converter in Software Standby Mode ................................................................. 815
24.4.4
Note on Entering Deep Software Standby Mode ................................................................................... 815
24.4.5
Note when Using the A/D Converter and D/A Converter Simultaneously ............................................ 815
25.
RAM .......................................................................................................................................................... 817
25.1
Overview ......................................................................................................................................................... 817
25.2
Operation ......................................................................................................................................................... 817
25.2.1
Data Retention ........................................................................................................................................ 817
25.2.2
Power-Down Function ........................................................................................................................... 817
26.
ROM (Flash Memory for Code Storage) ................................................................................................... 818
26.1
Overview ......................................................................................................................................................... 818
26.2
Register Descriptions ...................................................................................................................................... 821
26.2.1
Flash Mode Register (FMODR) ............................................................................................................. 822
26.2.2
Flash Access Status Register (FASTAT) ............................................................................................... 823
26.2.3
Flash Access Error Interrupt Enable Register (FAEINT) ...................................................................... 825
26.2.4
FCU RAM Enable Register (FCURAME) ............................................................................................. 826
26.2.5
Flash Status Register 0 (FSTATR0) ....................................................................................................... 827
26.2.6
Flash Status Register 1 (FSTATR1) ....................................................................................................... 830
26.2.7
Flash Ready Interrupt Enable Register (FRDYIE) ................................................................................. 831
26.2.8
Flash P/E Mode Entry Register (FENTRYR) ........................................................................................ 832
26.2.9
Flash Protection Register (FPROTR) ..................................................................................................... 835
26.2.10
Flash Reset Register (FRESETR) .......................................................................................................... 836
26.2.11
FCU Command Register (FCMDR) ...................................................................................................... 837
26.2.12
FCU Processing Switching Register (FCPSR) ....................................................................................... 838
26.2.13
Flash P/E Status Register (FPESTAT) ................................................................................................... 839
26.2.14
Peripheral Clock Notification Register (PCKAR) ................................................................................. 840
26.2.15
Flash Write Erase Protection Register (FWEPROR) ............................................................................. 841
26.3
Configuration of Memory Mats for the ROM ................................................................................................. 842
26.4
Block Configuration ........................................................................................................................................ 842
26.5
Operating Modes Associated with the ROM .................................................................................................. 843
26.6
Programming and Erasing the ROM ............................................................................................................... 846
26.6.1
FCU Modes ............................................................................................................................................ 846
26.6.1.1
ROM Read Modes ............................................................................................................................. 847
26.6.1.2
ROM P/E Modes ............................................................................................................................... 847
26.6.2
FCU Commands ..................................................................................................................................... 848