Kikusui PAT160-25T, Руководство по эксплуатации

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7-46
PAT-T 4KW
Event status register
The event status register bits are set when certain events occur during PAT
operation. All bits of the event status register are set by the error event queue.
The register is defined by the IEEE488.2 standard and is controlled by the
IEEE488.2 common commands *ESE, *ESE?, and *ESR?.
p. A-7
Check to the SYST:ERR? for the description of the error.
Table 7-10 Event stat u s register (Standard Event Stat u s Register)
See
Bit
Bit
Weight
Bit N ame Description
Error
Code
0 1
Operation
Complete (OPC) Set w hen an *OPC command is received
and all operations in standby are complete.
- 8 00 to
- 8 99
1 2
Req u est Control
(RQC)
N ot u sed
–
2 4
Q u ery Error (QYE) Set w hen an attempt is made to read data
from the o u tp u t q u e u e w hen there is no
o u tp u t or the error q u e u e is in w ait stat u s.
Indicates that there is no data in the error
q
u e u e.
-400 to
-499
3 8
Device Dependent
Error (DDE) Set w hen there is a device-specific error. -300 to
-399
100 to
199
4 16
Exec u tion Error
(EXE)
Set w hen the PAT eval u ates the program
data follo w ing the header is o u tside the
formal inp u t range or does not match the
performance of the PAT.
This indicates that a valid SCPI command
may not be exec
u ted correctly depending
on the conditions of the PAT.
-200 to
-299
5 32
Command Error
(CME) Set w hen an IEEE 4 88 .2 syntax error is
detected, w hen an u nidentifiable header is
received, or w hen a gro u p exec u tion trigger
enters the internal IEEE 4 88 .2 SCPI
command inp u t b u ffer.
-100 to
-199
6 64 Reserved N ot u sed –
7 12 8 Po w er O N (PO N ) Set w hen the po w er is t u rned on. –
8 -15 – Reserved N ot u sed –