Volume 2, Part 1: Processor Abstraction Layer
2:357
a. Calling this procedure may affect resources on multiple processors. Please refer to implementation-specific reference manuals
for details.
Table 11-53.PAL Processor Self Test Procedures
Procedure
Idx
Class
Conv.
Mode
Buffer
Description
PAL_CACHE_LINE_INIT
a
a. Calling this procedure may affect resources on multiple processors. Please refer to implementation-specific reference manuals
for details.
31 Req.
Static
Phys.
No
Initialize tags and data of a cache line for
processor testing.
PAL_CACHE_READ
259 Opt.
Stacked Phys.
No
Read tag and data of a cache line for diagnostic
testing.
PAL_CACHE_WRITE
260 Opt.
Stacked Phys.
No
Write tag and data of a cache for diagnostic
testing.
PAL_TEST_INFO
37 Req.
Static
Phys.
No
Returns alignment and size requirements
needed for the memory buffer passed to the
PAL_TEST_PROC procedure as well as
information on self-test control words for the
processor self tests.
PAL_TEST_PROC
258 Req.
Stacked Phys.
No
Perform late processor self test.
Table 11-54.PAL Support Procedures
Procedure
Idx
Class
Conv.
Mode
Buffer
Description
PAL_COPY_INFO
30 Req.
Static
Phys.
No
Return information needed to relocate PAL
procedures and PAL PMI code to memory.
PAL_COPY_PAL
256 Req.
Stacked Phys.
No
Relocate PAL procedures and PAL PMI code to
memory.
PAL_MEMORY_BUFFER
a
a. Calling this procedure may affect resources on multiple processors. Please refer to implementation-specific reference manuals
for details.
277 Opt.
Stacked Phys.
No
Provides cacheable memory to PAL for
exclusive use during runtime.
PAL_PMI_ENTRYPOINT
32 Req.
Static
Phys.
No
Register PMI memory entrypoints with
processor.
Table 11-55.PAL Virtualization Support Procedures
Procedure
Idx
Class
Conv.
Mode
Buffer
Description
PAL_VP_CREATE
265 Opt.
Stacked Virt.
Dep.
Initializes a new VPD for the operation of a new
virtual processor in the virtual environment.
PAL_VP_ENV_INFO
266 Opt.
Stacked Virt.
Dep.
Returns the parameters needed to enter a
virtual environment.
PAL_VP_EXIT_ENV
267 Opt.
Stacked Virt.
Dep.
Allows a logical processor to exit a virtual
environment.
PAL_VP_INFO
50 Opt.
Static
Phys.
No
Returns information about virtual processor
features.
PAL_VP_INIT_ENV
268 Opt.
Stacked Virt.
Dep.
Allows a logical processor to enter a virtual
environment.
PAL_VP_REGISTER
269 Opt.
Stacked Virt.
Dep.
Register a different host IVT for the virtual
processor.
PAL_VP_RESTORE
270 Opt.
Stacked Virt.
Dep.
Restore virtual processor state on the logical
processor.
Содержание ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Страница 1: ......
Страница 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 12: ...1 1 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Part I Application Architecture Guide ...
Страница 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Страница 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Страница 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Страница 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Страница 230: ......
Страница 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 249: ...2 1 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Part I System Architecture Guide ...
Страница 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Страница 380: ...2 132 Volume 2 Part 1 Interruptions ...
Страница 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Страница 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Страница 749: ...2 501 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Part II System Programmer s Guide ...
Страница 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Страница 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Страница 808: ...2 560 Volume 2 Part 2 Context Management ...
Страница 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Страница 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Страница 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Страница 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Страница 891: ......
Страница 941: ...3 42 Volume 3 Instruction Reference cmp illegal_operation_fault PR p1 0 PR p2 0 Interruptions Illegal Operation fault ...
Страница 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Страница 1191: ...3 292 Volume 3 Pseudo Code Functions Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Страница 1296: ......
Страница 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Страница 1564: ...4 262 Volume 4 Base IA 32 Instruction Reference LES Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 1565: ...Volume 4 Base IA 32 Instruction Reference 4 263 LFS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 1568: ...4 266 Volume 4 Base IA 32 Instruction Reference LGS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 1583: ...Volume 4 Base IA 32 Instruction Reference 4 281 LSS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Страница 1663: ...Volume 4 Base IA 32 Instruction Reference 4 361 SHL SHR Shift Instructions See entry for SAL SAR SHL SHR ...
Страница 1668: ...4 366 Volume 4 Base IA 32 Instruction Reference SIDT Store Interrupt Descriptor Table Register See entry for SGDT SIDT ...
Страница 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Страница 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Страница 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...