Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Руководство пользователя

Страница: 304 / 1898

2:56 Volume 2, Part 1: Addressing and Protection
4.1.1.6 Page Access Rights
Page granular access controls use 4 levels of privilege. Privilege level 0 is the most
privileged and has access to all privileged instructions; privilege level 3 is least
privileged. Access (including IA-32) to a page is determined by the TLB.ar and TLB.pl
fields, and by the privilege level of the access, as defined in
Table 4-4 . RSE fills and
spills obtain their privilege level from RSC.pl; all other accesses (including IA-32) obtain
their privilege level from PSR.cpl. Within each cell, “–” means no access, “R” means
read access, “W” means write access, “X” means execute access, and “Pn” means
promote PSR.cpl to privilege level “n” when an Enter Privileged Code (
epc
) instruction
is executed.
Figure 4-6. Translation Insertion Format – Not Present
63 32 31 12 11 8 7 2 1 0
GR[ r ] ig 0
ITIR rv/ci key ps rv/ci
IFA vpn ig
RR[vrn] rv rid ig rv ig
Table 4-4. Page Access Rights
TLB.ar TLB.pl
Privilege Level
a
Description
3 2 1 0
0 3 R R R R read only
2 – R R R
1 – – R R
0 – – – R
1 3 RX RX RX RX read, execute
2 – RX RX RX
1 – – RX RX
0 – – – RX
2 3 RW RW RW RW read, write
2 – RW RW RW
1 – – RW RW
0 – – – RW
3 3 RWX RWX RWX RWX read, write, execute
2 – RWX RWX RWX
1 – – RWX RWX
0 – – – RWX
4 3 R RW RW RW read only / read, write
2 – R RW RW
1 – – R RW
0 – – – RW
5 3 RX RX RX RWX read, execute / read, write, exec
2 – RX RX RWX
1 – – RX RWX
0 – – – RWX