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15.7.4.1
Function block
GUID-EE44CFDF-C8F7-4870-BD1C-98D9CD91FD97 v4
LLD
INPUT
OUT
IEC15000144.vsd
IEC15000144 V1 EN-US
Figure 161:
LLD function block
15.7.4.2
Signals
PID-3805-INPUTSIGNALS v5
Table 264:
LLD Input signals
Name
Type
Default
Description
INPUT
BOOLEAN
0
Input signal
PID-3805-OUTPUTSIGNALS v5
Table 265:
LLD Output signals
Name
Type
Description
OUT
BOOLEAN
Output signal delayed one execution cycle
15.7.4.3
Technical data
GUID-B2E6F510-8766-4381-9618-CE02ED71FFB6 v1
Table 266:
Number of LLD instances
Logic block
Quantity with cycle time
3 ms
8 ms
100 ms
LLD
10
10
20
15.7.5
OR function block
IP11012-1 v3
M11449-3 v2
The OR function is used to form general combinatory expressions with boolean
variables. The OR function block has up to six inputs and two outputs. One of the
outputs is inverted.
1MRK 511 408-UUS A
Section 15
Logic
Phasor measurement unit RES670 2.2 ANSI
435
Technical manual
Содержание Relion RES670
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