110
MicroBlaze Processor Reference Guide
UG081 (v14.7)
Chapter 3:
MicroBlaze Signal Interface Description
Values for access permissions, memory types, quality of service and shareability domain are defined
in
.
Table 3-3:
AXI Interface Signal Definitions
Interface
Signal
Description
M_AXI_IP
C_M_AXI_IP_ARPROT
Access Permission:
• Unprivileged, secure instruction access (100)
M_AXI_DP
C_M_AXI_DP_ARCACHE
C_M_AXI_DP_AWCACHE
Memory Type, AXI4 protocol:
• Normal Non-cacheable Bufferable (0011)
C_M_AXI_DP_ARPROT
C_M_AXI_DP_AWPROT
Access Permission, AXI4 and AXI4-Lite protocol:
• Unprivileged, secure data access (000)
C_M_AXI_DP_ARQOS
C_M_AXI_DP_AWQOS
Quality of Service, AXI4 protocol:
• Priority 8 (1000)
M_AXI_IC
C_M_AXI_IC_ARCACHE
Memory Type:
• Write-back Read and Write-allocate (1111)
M_ACE_IC
C_M_AXI_IC_ARCACHE
Memory Type, normal access:
• Write-back Read and Write-allocate (1111)
Memory Type, DVM access:
• Normal Non-cacheable Non-bufferable (0010)
C_M_AXI_IC_ARDOMAIN
Shareability Domain:
• Inner shareable (01)
M_AXI_IC
M_ACE_IC
C_M_AXI_IC_ARPROT
Access Permission:
• Unprivileged, secure instruction access (100)
C_M_AXI_IC_ARQOS
Quality of Service:
• Priority 7 (0111)
M_AXI_DC
C_M_AXI_DC_ARCACHE
Memory Type, normal access:
• Write-back Read and Write-allocate (1111)
Memory Type, exclusive access:
• Normal Non-cacheable Non-bufferable (0010)
M_ACE_DC
C_M_AXI_DC_ARCACHE
Memory Type, normal and exclusive access:
• Write-back Read and Write-allocate (1111)
Memory Type, DVM access:
• Normal Non-cacheable Non-bufferable (0010)
C_M_AXI_DC_ARDOMAIN
C_M_AXI_DC_AWDOMAIN
Shareability Domain:
• Inner shareable (01)