Xilinx MicroBlaze, Reference Manual

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MicroBlaze Processor Reference Guide www.xilinx.com 35
UG081 (v14.7)
Registers
Stack Low Register (SLR)
The Stack Low Register stores the stack low limit use to detect stack overflow. When the address of
a load or store instruction using the stack pointer (register R1) as rA is less than the Stack Low
Register, a stack overflow occurs, causing a Stack Protection Violation exception if exceptions are
enabled in MSR.
When read with the MFS instruction, the SLR is specified by setting Sa = 0x0800. Figure 2-10
illustrates the SLR register and Table 2-16 provides bit descriptions and reset values.
Note:
The register is only implemented if
C_USE_STACK_PROTECTION
is set to 1.
Stack High Register (SHR)
The Stack High Register stores the stack high limit use to detect stack underflow. When the address
of a load or store instruction using the stack pointer (register R1) as rA is greater than the Stack High
Register, a stack underflow occurs, causing a Stack Protection Violation exception if exceptions are
enabled in MSR.
When read with the MFS instruction, the SHR is specified by setting Sa = 0x0802. Figure 2-11
illustrates the SHR register and Table 2-17 provides bit descriptions and reset values.
Note:
The register is only implemented if
C_USE_STACK_PROTECTION
is set to 1.
0 31
↑
SLR
Figure 2-10: SLR
Table 2-16: Stack Low Register (SLR)
Bits Name Description Reset Value
0:31 SLR Stack Low Register 0x00000000
0 31
↑
SHR
Figure 2-11: SHR
Table 2-17: Stack High Register (SHR)
Bits Name Description Reset Value
0:31 SHR Stack High Register 0xFFFFFFFF
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