MicroBlaze Processor Reference Guide
23
UG081 (v14.7)
Instructions
the read and the update. Other devices can read from the semaphore location during the operation.
For a semaphore operation to work properly, the LWX instruction must be paired with an SWX
instruction, and both must specify identical addresses. The reservation granularity in MicroBlaze is
a word. For both instructions, the address must be word aligned. No unaligned exceptions are
generated for these instructions.
The conditional store is always performed when a reservation exists, even if the store address does
not match the load address that set the reservation.
Only one reservation can be maintained at a time. The address associated with the reservation can be
changed by executing a subsequent LWX instruction. The conditional store is performed based upon
the reservation established by the last LWX instruction executed. Executing an SWX instruction
always clears a reservation held by the processor, whether the address matches that established by
the LWX or not.
Reset, interrupts, exceptions, and breaks (including the BRK and BRKI instructions) all clear the
reservation.
The following provides general guidelines for using the LWX and SWX instructions:
•
The LWX and SWX instructions should be paired and use the same address.
•
An unpaired SWX instruction to an arbitrary address can be used to clear any reservation held
by the processor.
•
A conditional sequence begins with an LWX instruction. It can be followed by memory
accesses and/or computations on the loaded value. The sequence ends with an SWX
instruction. In most cases, failure of the SWX instruction should cause a branch back to the
LWX for a repeated attempt.
•
An LWX instruction can be left unpaired when executing certain synchronization primitives if
the value loaded by the LWX is not zero. An implementation of Test and Set exemplifies this:
loop:
lwx
r5,r3,r0
; load and reserve
bnei
r5,next
; branch if not equal to zero
addik
r5,r5,1
; increment value
swx
r5,r3,r0
; try to store non-zero value
addic
r5,r0,0
; check reservation
bnei
r5,loop
; loop if reservation lost
next:
•
Performance can be improved by minimizing looping on an LWX instruction that fails to
return a desired value. Performance can also be improved by using an ordinary load instruction
to do the initial value check. An implementation of a spinlock exemplifies this:
loop:
lw
r5,r3,r0
; load the word
bnei
r5,loop
; loop back if word not equal to 0
lwx
r5,r3,r0
; try reserving again
bnei
r5,loop
; likely that no branch is needed
addik
r5,r5,1
; increment value
swx
r5,r3,r0 ; try to store non-zero value
addic
r5,r0,0
; check reservation
bnei
r5,loop
; loop if reservation lost
•
Minimizing the looping on an LWX/SWX instruction pair increases the likelihood that forward
progress is made. The old value should be tested before attempting the store. If the order is
reversed (store before load), more SWX instructions are executed and reservations are more
likely to be lost between the LWX and SWX instructions.
