Xilinx MicroBlaze, Reference Manual

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30 www.xilinx.com MicroBlaze Processor Reference Guide
UG081 (v14.7)
Chapter 2: MicroBlaze Architecture
Exception Address Register (EAR)
The Exception Address Register stores the full load/store address that caused the exception for the
following:
•
An unaligned access exception that means the unaligned access address
•
A DPLB or M_AXI_DP exception that specifies the failing PLB or AXI4 data access address
•
A data storage exception that specifies the (virtual) effective address accessed
•
An instruction storage exception that specifies the (virtual) effective address read
•
A data TLB miss exception that specifies the (virtual) effective address accessed
•
An instruction TLB miss exception that specifies the (virtual) effective address read
The contents of this register is undefined for all other exceptions. When read with the MFS
instruction, the EAR is specified by setting Sa = 0x0003. The EAR register is illustrated in
Figure 2-5 and Table 2-10 provides bit descriptions and reset values.
0 31
↑
EAR
Figure 2-5: EAR
Table 2-10: Exception Address Register (EAR)
Bits Name Description Reset Value
0:31 EAR Exception Address Register 0x00000000
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