20
MicroBlaze Processor Reference Guide
UG081 (v14.7)
Chapter 2:
MicroBlaze Architecture
BRLD Rd,Rb
100110
Rd
10100
Rb
00000000000 PC := PC + Rb
Rd := PC
BRA Rb
100110
00000 01000
Rb
00000000000 PC := Rb
BRAD Rb
100110
00000 11000
Rb
00000000000 PC := Rb
BRALD Rd,Rb
100110
Rd
11100
Rb
00000000000 PC := Rb
Rd := PC
BRK Rd,Rb
100110
Rd
01100
Rb
00000000000 PC := Rb
Rd := PC
MSR[BIP] := 1
BEQ Ra,Rb
100111
00000
Ra
Rb
00000000000 PC := PC + Rb if Ra = 0
BNE Ra,Rb
100111
00001
Ra
Rb
00000000000 PC := PC + Rb if Ra != 0
BLT Ra,Rb
100111
00010
Ra
Rb
00000000000 PC := PC + Rb if Ra < 0
BLE Ra,Rb
100111
00011
Ra
Rb
00000000000 PC := PC + Rb if Ra <= 0
BGT Ra,Rb
100111
00100
Ra
Rb
00000000000 PC := PC + Rb if Ra > 0
BGE Ra,Rb
100111
00101
Ra
Rb
00000000000 PC := PC + Rb if Ra >= 0
BEQD Ra,Rb
100111
10000
Ra
Rb
00000000000 PC := PC + Rb if Ra = 0
BNED Ra,Rb
100111
10001
Ra
Rb
00000000000 PC := PC + Rb if Ra != 0
BLTD Ra,Rb
100111
10010
Ra
Rb
00000000000 PC := PC + Rb if Ra < 0
BLED Ra,Rb
100111
10011
Ra
Rb
00000000000 PC := PC + Rb if Ra <= 0
BGTD Ra,Rb
100111
10100
Ra
Rb
00000000000 PC := PC + Rb if Ra > 0
BGED Ra,Rb
100111
10101
Ra
Rb
00000000000 PC := PC + Rb if Ra >= 0
ORI Rd,Ra,Imm
101000
Rd
Ra
Imm
Rd := Ra or s(Imm)
ANDI Rd,Ra,Imm
101001
Rd
Ra
Imm
Rd := Ra and s(Imm)
XORI Rd,Ra,Imm
101010
Rd
Ra
Imm
Rd := Ra xor s(Imm)
ANDNI Rd,Ra,Imm
101011
Rd
Ra
Imm
Rd := Ra and s(Imm)
IMM Imm
101100
00000 00000
Imm
Imm[0:15] := Imm
RTSD Ra,Imm
101101
10000
Ra
Imm
PC := Ra + s(Imm)
RTID Ra,Imm
101101
10001
Ra
Imm
PC := Ra + s(Imm)
MSR[IE] := 1
RTBD Ra,Imm
101101
10010
Ra
Imm
PC := Ra + s(Imm)
MSR[BIP] := 0
RTED Ra,Imm
101101
10100
Ra
Imm
PC := Ra + s(Imm)
MSR[EE] := 1, MSR[EIP] := 0
ESR := 0
Table 2-6:
MicroBlaze Instruction Set Summary
(Continued)
Type A
0-5
6-10
11-15 16-20
21-31
Semantics
Type B
0-5
6-10
11-15
16-31