Toshiba TMPM3V4, Manual

Page: 213 / 544

11.3.5 UARTxFR (UART Flag Register)
31 30 29 28 27 26 25 24
Bit symbol - - - - - - - -
After reset 0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
Bit symbol - - - - - - - -
After reset 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
Bit symbol - - - - - - - -
After reset 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
Bit symbol TXFE RXFF TXFF RXFE BUSY - - -
After reset 0 0 0 0 0 0 0 0
Bit Bit symbol Type Function
31-9 − R Read as an undefined value.
8 - R Read as an undefined value.
7 TXFE R When UARTxLCR_H<FEN> = "1"
0: The transmit FIFO is not empty.
1: The transmit FIFO is empty.
When UARTxLCR_H<FEN> = "0"
0: The transmit hold register is not empty.
1: The transmit hold register is empty.
6 RXFF R When UARTxLCR_H<FEN> = "1"
0: The receive FIFO is not full.
1: The receive FIFO is full.
When UARTxLCR_H<FEN> = "0"
0: The receive hold register is not full.
1: The receive hold register is full.
5 TXFF R When UARTxLCR_H<FEN> = "1"
0: The transmit FIFO is not full.
1: The transmit FIFO is full.
When UARTxLCR_H<FEN> = "0"
0: The transmit hold register is not full.
1: The transmit hold register is full.
4 RXFE R When UARTxLCR_H<FEN> = "1"
0: The receive FIFO is not empty.
1: The receive FIFO is empty.
When UARTxLCR_H<FEN> = "0"
0: The receive hold register is not empty.
1: The receive hold register is empty.
3 BUSY R UART busy
0: UART transmission is stopping.
1: UART transmission is ongoing.
This bit is set to "1" when the transmit FIFO is not empty regardless of whether UART operation is ena-
bled or not.
2 - R Read as an undefined value.
1 - R Read as an undefined value.
0 - R Read as an undefined value.
Note:<TXFE> does not indicate the status of shift register.
TMPM3V6/M3V4
Page 191
2019-02-06