24
SPRUH91D – March 2013 – Revised September 2016
Copyright © 2013–2016, Texas Instruments Incorporated
List of Figures
14-2.
Submodules and Signal Connections for an ePWM Module
........................................................
14-3.
ePWM Submodules and Critical Internal Signal Interconnects
.....................................................
14-4.
Time-Base Submodule Block Diagram
................................................................................
14-5.
Time-Base Submodule Signals and Registers
........................................................................
14-6.
Time-Base Frequency and Period
......................................................................................
14-7.
Time-Base Counter Synchronization Scheme 1
......................................................................
14-8.
Time-Base Up-Count Mode Waveforms
...............................................................................
14-9.
Time-Base Down-Count Mode Waveforms
...........................................................................
14-10. Time-Base Up-Down-Count Waveforms, TBCTL[PHSDIR = 0] Count Down on Synchronization Event
.....
14-11. Time-Base Up-Down Count Waveforms, TBCTL[PHSDIR = 1] Count Up on Synchronization Event
........
14-12. Counter-Compare Submodule
..........................................................................................
14-13. Counter-Compare Submodule Signals and Registers
...............................................................
14-14. Counter-Compare Event Waveforms in Up-Count Mode
............................................................
14-15. Counter-Compare Events in Down-Count Mode
.....................................................................
14-16. Counter-Compare Events in Up-Down-Count Mode, TBCTL[PHSDIR = 0] Count Down on
Synchronization Event
...................................................................................................
14-17. Counter-Compare Events in Up-Down-Count Mode, TBCTL[PHSDIR = 1] Count Up on Synchronization
Event
.......................................................................................................................
14-18. Action-Qualifier Submodule
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14-19. Action-Qualifier Submodule Inputs and Outputs
......................................................................
14-20. Possible Action-Qualifier Actions for EPWMxA and EPWMxB Outputs
...........................................
14-21. Up-Down-Count Mode Symmetrical Waveform
.......................................................................
14-22. Up, Single Edge Asymmetric Waveform, With Independent Modulation on EPWMxA and
EPWMxB—Active High
..................................................................................................
14-23. Up, Single Edge Asymmetric Waveform With Independent Modulation on EPWMxA and
EPWMxB—Active Low
...................................................................................................
14-24. Up-Count, Pulse Placement Asymmetric Waveform With Independent Modulation on EPWMxA
.............
14-25. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and
EPWMxB — Active Low
.................................................................................................
14-26. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and
EPWMxB — Complementary
...........................................................................................
14-27. Up-Down-Count, Dual Edge Asymmetric Waveform, With Independent Modulation on EPWMxA—Active
Low
.........................................................................................................................
14-28. Dead-Band Generator Submodule
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14-29. Configuration Options for the Dead-Band Generator Submodule
..................................................
14-30. Dead-Band Waveforms for Typical Cases (0% < Duty < 100%)
...................................................
14-31. PWM-Chopper Submodule
..............................................................................................
14-32. PWM-Chopper Submodule Signals and Registers
...................................................................
14-33. Simple PWM-Chopper Submodule Waveforms Showing Chopping Action Only
................................
14-34. PWM-Chopper Submodule Waveforms Showing the First Pulse and Subsequent Sustaining Pulses
.......
14-35. PWM-Chopper Submodule Waveforms Showing the Pulse Width (Duty Cycle) Control of Sustaining
Pulses
......................................................................................................................
14-36. Trip-Zone Submodule
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14-37. Trip-Zone Submodule Mode Control Logic
............................................................................
14-38. Trip-Zone Submodule Interrupt Logic
..................................................................................
14-39. Event-Trigger Submodule
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14-40. Event-Trigger Submodule Inter-Connectivity to Interrupt Controller
...............................................
14-41. Event-Trigger Submodule Showing Event Inputs and Prescaled Outputs
........................................
14-42. Event-Trigger Interrupt Generator
......................................................................................
14-43. HRPWM System Interface
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14-44. Resolution Calculations for Conventionally Generated PWM
.......................................................