t
C2EDELAY
SPIx_SCS[n]
SPIx_CLK
SPIx_SOMI
SPIx_ENA
SPIx_SCS[n]
SPIx_CLK
SPIx_SOMI
t
T2EDELAY
SPIx_ENA
SPIx_SCS[n]
SPIx_CLK
SPIx_SOMI
SPI module clock
t
T2CDELAY
Registers
1221
SPRUH91D – March 2013 – Revised September 2016
Copyright © 2013–2016, Texas Instruments Incorporated
Serial Peripheral Interface (SPI)
Figure 27-35. Example: t
T2CDELAY
= 4 SPI Module Clock Cycles
Figure 27-36. Transmit-Data-Finished-to-SPIx_ENA-Inactive-Timeout
Figure 27-37. Chip-Select-Active-to-SPIx_ENA-Signal-Active-Timeout