CHAPTER 22 LOW-VOLTAGE DETECTOR
User’s Manual U16896EJ2V0UD
617
(2) Interrupt operation (INTLVI)
<When starting operation>
<1> Mask the INTLVI interrupt (LVIMK bit = 1).
<2> Set the detection voltage (V
LVI
) using the LVIS.LVIS2 to LVIS.LVIS0 bits.
<3> Set the LVIM.LVION bit to 1 (enables low-voltage detector operation).
<4> Use software to instigate a wait of at least 0.2 ms.
<5> Confirm that the LVIM.LVIF bit is cleared to 0 (supply voltage (V
DD
) > detection voltage (V
LVI
)).
When the LVIF bit is set to 1, use software to instigate a wait until the LVIF bit is cleared to 0.
<6> Clear the INTLVI interrupt request flag (LVIIF bit) to 0.
<7> Release the INTLVI interrupt mask status (LVIMK bit = 0).
Caution <1> must always be executed. When the LVIMK bit = 0, an interrupt (INTLVI) may
occur immediately after the processing in <3>.
<When stopping operation>
Clear the LVION bit to 0.
Figure 22-2. Timing of INTLVI Interrupt Generation by Low-Voltage Detector
Supply voltage (
V
DD
)
Low-voltage detector
detection voltage (
V
LVI
)
Power-on-clear circuit
detection voltage (
V
POC
)
LVI detection
signal
(active low)
LVION bit
INTLVI
signal generated
POCRES
signal generated
INTLVI
signal generated
