CHAPTER 3 CPU FUNCTIONS
User’s Manual U16896EJ2V0UD
66
[Description Example] When using PSC register (standby mode setting)
ST.B r11, PSMR[r0] ; PSMR register setting (IDLE, STOP mode setting)
<1>
MOV 0x02, r10
<2>
ST.B r10, PRCMD[r0] ; PRCMD register write
<3>
ST.B r10, PSC[r0]
; PSC register setting
<4>
NOP
Note
; Dummy instruction
<5>
NOP
Note
; Dummy instruction
<6>
NOP
Note
; Dummy instruction
<7>
NOP
Note
; Dummy instruction
<8>
NOP
Note
; Dummy instruction
(next instruction)
No special sequence is required to read special registers.
Note
When switching to the IDLE mode or the STOP mode (PSC.STP bit = 1), 5 NOP instructions must be
inserted immediately after switching is performed.
Cautions 1. Interrupts are not acknowledged for the store instruction for the PRCMD register. This is
because continuous execution of store instructions by the program in steps <2> and <3>
above is assumed. If another instruction is placed between step <2> and <3>, the above
sequence may not be realized when an interrupt is acknowledged for that instruction,
which may cause malfunction.
2. The data written to the PRCMD register is dummy data, but use the same register as the
general-purpose register used for setting data to the special register (step <3>) when
writing to the PRCMD register (step <2>). The same applies to when using a general-
purpose register for addressing.
(2) Command register (PRCMD)
The PRCMD register is an 8-bit register used to prevent data from being written to registers that may have a
large influence on the system, possibly causing the application system to unexpectedly stop, when an
inadvertent program loop occurs. Only the first write operation to the special register following the execution of
a previously executed write operation to the PRCMD register, is valid.
As a result, register values can be overwritten only using a preset sequence, preventing invalid write
operations.
This register can only be written in 8-bit units (if it is read, an undefined value is returned).
7
REG7
PRCMD
6
REG6
5
REG5
4
REG4
3
REG3
2
REG2
1
REG1
0
REG0
After reset: Undefined W Address: FFFFF1FCH
