CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
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Figure 7-21. Example of Register Settings in Clear & Start Mode Entered by TI010 Pin Valid Edge Input (2/2)
(d) Prescaler mode register 01 (PRM01), selector operation control register 1 (SELCNT1)
0/1
PRM01
0/1
0/1
0/1
0
PRM011 PRM010
ES111
ES110
ES101
ES100
Count clock selection
(setting TI010 valid edge is prohibited)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
(setting prohibited when CRC011 = 1)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
0
0/1
0/1
SELCNT1
ISEL11
0/1
(e) 16-bit timer counter 01 (TM01)
By reading the TM01 register, the count value can be read.
(f) 16-bit capture/compare register 010 (CR010)
When this register is used as a compare register and when its value matches the count value of the TM01
register, an interrupt signal (INTTM010) is generated. The count value of the TM01 register is not cleared.
To use this register as a capture register, select either the TI010 or TI011 pin input as a capture trigger.
When the valid edge of the capture trigger is detected, the count value of the TM01 register is stored in the
CR010 register.
(g) 16-bit capture/compare register 011 (CR011)
When this register is used as a compare register and when its value matches the count value of the TM01
register, an interrupt signal (INTTM011) is generated. The count value of the TM01 register is not cleared.
When this register is used as a capture register, the TI010 pin input is used as a capture trigger. When the
valid edge of the capture trigger is detected, the count value of the TM01 register is stored in the CR011
register.
