CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
User’s Manual U16896EJ2V0UD
157
(c) Notes on rewriting TP0CCR0 register
To change the value of the TP0CCR0 register to a smaller value, stop counting once and then change the
set value.
If the value of the TP0CCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow.
FFFFH
16-bit counter
0000H
TP0CE bit
TP0CCR0 register
TP0OL0 bit
TOP00 pin output
INTTP0CC0 signal
D
1
D
2
D
1
D
1
D
2
D
2
D
2
L
Interval time (1)
Interval time (NG)
Interval
time (2)
Remark
Interval time (1): (D
1
+ 1)
×
Count clock cycle
Interval time (NG): ( D
2
+ 1)
×
Count clock cycle
Interval time (2): (D
2
+ 1)
×
Count clock cycle
If the value of the TP0CCR0 register is changed from D
1
to D
2
while the count value is greater than D
2
but
less than D
1
, the count value is transferred to the CCR0 buffer register as soon as the TP0CCR0 register
has been rewritten. Consequently, the value of the 16-bit counter that is compared is D
2
.
Because the count value has already exceeded D
2
, however, the 16-bit counter counts up to FFFFH,
overflows, and then counts up again from 0000H. When the count value matches D
2
, the INTTP0CC0
signal is generated and the output of the TOP00 pin is inverted.
Therefore, the INTTP0CC0 signal may not be generated at the interval time “(D
1
+ 1)
×
Count clock cycle”
or “(D
2
+ 1)
×
Count clock cycle” originally expected, but may be generated at an interval of “( D
2
+ 1)
×
Count clock cycle”.
