CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
User’s Manual U16896EJ2V0UD
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Figure 7-16. Timing Example of Clear & Start Mode Entered by TI010 Pin Valid Edge Input
(CR010 Register: Compare Register, CR011 Register: Capture Register) (1/2)
(a) TOC01 = 13H, PRM01 = 10H, CRC01, = 04H, TMC01 = 08H, CR010 = 0000H
TM01 register
0000H
Operable bits
(TMC013, TMC012)
Capture & count clear input
(TI010 pin input)
Compare register
(CR010)
Compare match interrupt
(INTTM010)
Capture register
(CR011)
Capture interrupt
(INTTM011)
TO01 pin output
0000H
10
Q
P
N
M
S
00
0000H
M
N
S
P
Q
This is an application example where the output level of the TO01 pin is inverted when the count value has
been captured & cleared.
The count value is captured to the CR011 register and the TM01 register is cleared (to 0000H) when the valid
edge of the TI010 pin is detected. When the count value of the TM01 register is 0000H, a compare match
interrupt signal (INTTM010) is generated, and the output level of the TO01 pin is inverted.
