CHAPTER 13 A/D CONVERTER
User’s Manual U16896EJ2V0UD
390
(11) Internal equivalent circuit
The following shows the equivalent circuit of the analog input block.
Figure 13-11. Internal Equivalent Circuit of ANIn Pin
ANIn
C
OUT
C
IN
R
IN
AV
REF0
R
IN
C
OUT
C
IN
4.5 V
3 k
Ω
8 pF
15 pF
2.7 V
60 k
Ω
8 pF
15 pF
Remarks 1.
The above values are reference values.
2.
n = 0 to 7
(12) Variation of A/D conversion results
The results of the A/D conversion may vary depending on the fluctuation of the supply voltage, or may be
affected by noise. To reduce the variation, take counteractive measures with the program such as averaging
the A/D conversion results.
(13) A/D conversion result hysteresis characteristics
The successive approximation type A/D converter holds the analog input voltage in the internal sample & hold
capacitor and then performs A/D conversion. After the A/D conversion has finished, the analog input voltage
remains in the internal sample & hold capacitor. As a result, the following phenomena may occur.
•
When the same channel is used for A/D conversions, if the voltage is higher or lower than the previous A/D
conversion, then hysteresis characteristics may appear where the conversion result is affected by the
previous value. Thus, even if the conversion is performed at the same potential, the result may vary.
•
When switching the analog input channel, hysteresis characteristics may appear where the conversion
result is affected by the previous channel value. This is because one A/D converter is used for the A/D
conversions. Thus, even if the conversion is performed at the same potential, the result may vary.
Therefore, to obtain more accurate conversion result, perform A/D conversion twice successively for the same
channel, and discard the first conversion result.
(14) A/D conversion operation in normal mode
•
In software trigger mode:
Rewriting the ADM, ADS, PFM, and PFT registers is prohibited in the normal mode (ADM.ADHS1,
ADM.ADHS0 bits = 00).
•
In hardware trigger (external trigger/timer trigger) mode:
This cannot be used in the normal mode (ADHS1, ADHS0 bits = 00). Use it in the high-speed mode
(ADHS1, ADHS0 bits = 10 or 01).
<R>
<R>
<R>
