LSI Logic Confidential
A-2
Register Listing
Copyright © 2001, 2002 by LSI Logic Corporation. All rights reserved.
IDC DMA Receive Status Register (IDC_RX_STATUS_REG_ADDR)
IDC DMA Transmit Address Pointer 1 Register
(IDC_TX_ADDR_PTR1_ADDR)
IDC DMA Transmit Address Pointer 2 Register
(IDC_TX_ADDR_PTR2_ADDR)
IDC DMA Transmit Address Pointer 3 Register
(IDC_TX_ADDR_PTR3_ADDR)
IDC DMA Transmit Address Pointer 4 Register
(IDC_TX_ADDR_PTR4_ADDR)
IDC DMA Transmit Control Register (IDC_TX_CONTROL REG_ADDR)
IDC DMA Transmit Status Register (IDC_TX_STATUS_REG_ADDR)
IDC FIFO Fullness Register (IDC_FIFO_STATUS)
IDC Master Address Register (IDC_MASTERADDR)
IDC Receive Data Register (IDC_RX_DATA)
IDC Receive Filter Register (IDC_RX_FILTER)
IDC Slave Address Register (IDC_SLAVEADDR)
IDC Status Register (IDC_STATUS1)
IDC Transmit Data Register (IDC_TX_DATA)
Internal Clock Control Register
Interrupt/GPIO Configuration Register
IR1 DMA Receive Address Pointer1 Register
(IR_RX_ADDR_PTR1_ADDR)
IR1 DMA Receive Address Pointer2 Register
(IR_RX_ADDR_PTR2_ADDR)
IR1 DMA Receive Address Pointer3 Register
(IR_RX_ADDR_PTR3_ADDR)
IR1 DMA Receive Address Pointer4 Register
(IR_RX_ADDR_PTR4_ADDR)
IR1 DMA Receive Control Register (IR_RX_CONTROL_REG_ADDR)
IR1 DMA Receive Status Register (IR_RX_STATUS_REG_ADDR)
IR1 DMA Transmit Address Pointer1 Register
(IR_TX_ADDR_PTR1_ADDR)
IR1 DMA Transmit Address Pointer2 Register
(IR_TX_ADDR_PTR2_ADDR)
IR1 DMA Transmit Address Pointer3 Register
(IR_TX_ADDR_PTR3_ADDR)
IR1 DMA Transmit Address Pointer4 Register
(IR_TX_ADDR_PTR4_ADDR)
IR1 DMA Transmit Control Register (IR_TX_CONTROL_REG_ADDR)
IR1 DMA Transmit Status Register (IR_TX_STATUS_REG_ADDR)
IR1 Modulated Signal Period Register (IR1_MSPR)
IR1 Modulated Signal Pulse Low Register (IR1_MSPL)
IR1 Receive Filter Register (IR1_RFR)
IR1 Receive Pulse High Tick Count Register (IR1_RPH)
IR1 Receive Tick Count Register (IR1_RTC)
IR1 Receive Tick Period Register (IR1_RTP)
IR1 Transmit Carrier Wave Period Register (IR1_CWP)