LSI Logic Confidential
15-52
Serial I/O Port
Copyright © 2001, 2002 by LSI Logic Corporation. All rights reserved.
IR1 Receive Tick Count Register (IR1_RTC)
Offset = 0xBF0010
Read/Write
Default = 0x0000 0000
This register consists of two parts: an enable bit to start noise pulse
filtering, and a receive tick count register, which records the time
between deassertions of the IR input in terms of IR ticks. The tick period
can be modified by programming the Receive Tick Period register.
Note:
Deassertion of the IR input can be on either the rising edge
or falling edge of SIO_IRRX, depending on the settings of
bit 24 in the IR1 Receive Filter Register (IR1_RFR)
S
Filter Start Pulse
24
1 = The IR receiver is disabled until IRRX is asserted for
a period specified by the IR Receive Filter register.
0 = The IR receiver is always enabled.
This value is cleared after the reception of a valid start
pulse.
RTC
Receive Tick Count
23:16
The tick count register records the tick count from the last
deassertion of SIO_IRRX to the current deassertion of
SIO_IRRX. This allows software to determine the validity
of the bits, as well as the value.
This field is read-only.
IR1 Receive Tick Period Register (IR1_RTP)
Offset = 0xBF0014
Read/Write
Default = 0x1B770000
31
25
24
23
16
RSVD
S
RTC
15
0
RSVD
31
30
16
RSVD
RTP