LSI Logic Confidential
Boundary Scan Chain Cells
17-17
Copyright © 2001, 2002 by LSI Logic Corporation. All rights reserved.
348
–
Control
[CTRL]
349
G19
SDRAM_DQM[3]
[OUT]
350
–
Control
[CTRL]
351
H20
SDRAM_CLK[1]
[OUT]
352
–
Control
[CTRL]
353
G20
SDRAM_CLK[1]
[OUT]
354
–
Control
[CTRL]
355
H19
SDRAM_DQ[23]
[IN/OUT]
356
–
Control
[CTRL]
357
H18
SDRAM_DQ[22]
[IN/OUT]
358
–
Control
[CTRL]
359
J17
SDRAM_DQ[21]
[IN/OUT]
360
–
Control
[CTRL]
361
J18
SDRAM_DQ[20]
[IN/OUT]
362
–
Control
[CTRL]
363
J19
SDRAM_DQS[2]
[IN/OUT]
364
–
Control
[CTRL]
365
J20
SDRAM_DQ[19]
[IN/OUT]
366
–
Control
[CTRL]
367
K17
SDRAM_DQ[18]
[IN/OUT]
368
–
Control
[CTRL]
369
K18
SDRAM_DQ[17]
[IN/OUT]
370
–
Control
[CTRL]
371
K19
SDRAM_DQ[16]
[IN/OUT]
372
–
Control
[CTRL]
Table 17.2
Boundary Scan Chain Cells (Cont.)
Cell
Pin
Name
Type