LSI Logic Confidential
Audio Output Control Register
12-13
Copyright © 2001, 2002 by LSI Logic Corporation. All rights reserved.
for the CS4227 for optimum performance). If clear and
Frform is not one or two, then the timing of each output
sample is 32 clocks. If Frform is one then the timing of
each sample is 16 clocks. Output timing is signaled by
the AO_FSYNC pin if there is an active output transfer
(GoO is set). When OTim is changed to a new value,
then FrForm should also be changed to a new value. This
may necessitate writing FrForm twice, if only OTim needs
to be changed. Programming note: This field should be
programmed at least one frame time before setting the
Go bit. See 2nd table in FrForm.
OS32
8
If set, output stream samples in memory occupy 32 bits;
otherwise, they occupy 16 bits. See second table in
FrForm.
OClkr
7
If set, audio output stream serial data and frame sync
(AO_D[3:0] and AO_FSYNC) are clocked on the falling
edge of the AO_SCLK input, otherwise they are clocked
on the rising edge. Programming note: This field should
be programmed at least one frame time before setting the
Go bit.
ChCnt
[6:5]
The number of audio output stream channels is 2
ChCnt
.
Audio data is stored as sets of interleaved samples from
each channel. Within each set, channel zero is stored at
the lowest address and channel 2
ChCnt
−
1 at the highest
address. With frame formats having two samples per
frame, even channels correspond to the left sample in
each frame and odd channels to the right sample in each
frame. When outputting less than 8 audio channels, zero
data is transmitted on the unused output channels.
Oclkr Value
Driving Edge
Sampling Edge
0
Rising
Falling
1
Falling
Rising