Intel Itanium 9150M, Manual

Page: 384 / 420

Volume 3: Resource and Dependency Semantics 3:375
• A list of all architecturally-defined, independently-writable resources in the Itanium
architecture. Each row represents an ‘atomic’ resource. Thus, for each row in the
table, hardware will probably require a separate write-enable control signal.
• For each resource, a complete list of readers and writers.
• For each instruction, a complete list of all resources read and written. Such a list
can be obtained by taking the union of all the rows in which each instruction
appears.
Table 5-2. RAW Dependencies Organized by Resource
Resource Name Writers Readers
Semantics of
Dependency
ALAT chk.a.clr,
mem-readers-alat ,
mem-writers , invala-all
mem-readers-alat ,
mem-writers , chk-a ,
invala.e
none
AR[BSP] br.call, brl.call, br.ret, cover,
mov-to-AR-BSPSTORE , rfi
br.call, brl.call, br.ia, br.ret, cover,
flushrs, loadrs,
mov-from-AR-BSP , rfi
impliedF
AR[BSPSTORE] alloc, loadrs, flushrs,
mov-to-AR-BSPSTORE
alloc, br.ia, flushrs,
mov-from-AR-BSPSTORE
impliedF
AR[CCV] mov-to-AR-CCV br.ia, cmpxchg ,
mov-from-AR-CCV
impliedF
AR[CFLG] mov-to-AR-CFLG br.ia, mov-from-AR-CFLG impliedF
AR[CSD] ld16, mov-to-AR-CSD br.ia, cmp8xchg16,
mov-from-AR-CSD , st16
impliedF
AR[EC] mod-sched-brs , br.ret,
mov-to-AR-EC
br.call, brl.call, br.ia, mod-sched-brs ,
mov-from-AR-EC
impliedF
AR[EFLAG] mov-to-AR-EFLAG br.ia, mov-from-AR-EFLAG impliedF
AR[FCR] mov-to-AR-FCR br.ia, mov-from-AR-FCR impliedF
AR[FDR] mov-to-AR-FDR br.ia, mov-from-AR-FDR impliedF
AR[FIR] mov-to-AR-FIR br.ia, mov-from-AR-FIR impliedF
AR[FPSR].sf0.controls mov-to-AR-FPSR , fsetc.s0 br.ia, fp-arith-s0 , fcmp-s0 , fpcmp-s0 ,
fsetc, mov-from-AR-FPSR
impliedF
AR[FPSR].sf1.controls mov-to-AR-FPSR , fsetc.s1 br.ia, fp-arith-s1 , fcmp-s1 , fpcmp-s1 ,
mov-from-AR-FPSR
AR[FPSR].sf2.controls mov-to-AR-FPSR , fsetc.s2 br.ia, fp-arith-s2 , fcmp-s2 , fpcmp-s2 ,
mov-from-AR-FPSR
AR[FPSR].sf3.controls mov-to-AR-FPSR , fsetc.s3 br.ia, fp-arith-s3 , fcmp-s3 , fpcmp-s3 ,
mov-from-AR-FPSR
AR[FPSR].sf0.flags fp-arith-s0 , fclrf.s0, fcmp-s0 ,
fpcmp-s0 , mov-to-AR-FPSR
br.ia, fchkf,
mov-from-AR-FPSR
impliedF
AR[FPSR].sf1.flags fp-arith-s1 , fclrf.s1, fcmp-s1 ,
fpcmp-s1 , mov-to-AR-FPSR
br.ia, fchkf.s1,
mov-from-AR-FPSR
AR[FPSR].sf2.flags fp-arith-s2 , fclrf.s2, fcmp-s2 ,
fpcmp-s2 , mov-to-AR-FPSR
br.ia, fchkf.s2,
mov-from-AR-FPSR
AR[FPSR].sf3.flags fp-arith-s3 , fclrf.s3, fcmp-s3 ,
fpcmp-s3 , mov-to-AR-FPSR
br.ia, fchkf.s3,
mov-from-AR-FPSR
AR[FPSR].traps mov-to-AR-FPSR br.ia, fp-arith , fchkf, fcmp, fpcmp,
mov-from-AR-FPSR
impliedF
AR[FPSR].rv mov-to-AR-FPSR br.ia, fp-arith , fchkf, fcmp, fpcmp,
mov-from-AR-FPSR
impliedF
AR[FSR] mov-to-AR-FSR br.ia, mov-from-AR-FSR impliedF