Intel Itanium 9150M, Manual

Page: 40 / 420

Volume 3: Instruction Reference 3:31
brl
system is required to provide an Illegal Operation fault handler which emulates taken
and not-taken long branches. Presence of this instruction is indicated by a 1 in the lb bit
of CPUID register 4. See
Section 3.1.11, “Processor Identification Registers” on
page 1:34 .
Operation: tmp_IP = IP + ( imm
60
<< 4); // determine branch target
if (!followed_by_stop())
undefined_behavior();
if (!instruction_implemented(BRL))
illegal_operation_fault();
switch ( btype ) {
case ‘cond’: // simple conditional branch
tmp_taken = PR[ qp ];
break;
case ‘call’: // call saves a return link
tmp_taken = PR[ qp ];
if (tmp_taken) {
BR[ b
1
] = IP + 16;
AR[PFS].pfm = CFM; // ... and saves the stack frame
AR[PFS].pec = AR[EC];
AR[PFS].ppl = PSR.cpl;
alat_frame_update(CFM.sol, 0);
rse_preserve_frame(CFM.sol);
CFM.sof -= CFM.sol;
// new frame size is size of outs
CFM.sol = 0;
CFM.sor = 0;
CFM.rrb.gr = 0;
CFM.rrb.fr = 0;
CFM.rrb.pr = 0;
}
break;
}
if (tmp_taken) {
taken_branch = 1;
IP = tmp_IP;
// set the new value for IP
if (!impl_uia_fault_supported() &&
((PSR.it && unimplemented_virtual_address(tmp_IP, PSR.vm))
|| (!PSR.it && unimplemented_physical_address(tmp_IP))))
unimplemented_instruction_address_trap(0,tmp_IP);
if (PSR.tb)
taken_branch_trap();
}
Interruptions:
Illegal Operation fault Taken Branch trap
Unimplemented Instruction Address trap