Intel Itanium 9150M, Manual

Page: 157 / 420

3:148 Volume 3: Instruction Reference
itc
Operation: if (PR[ qp ]) {
if (!followed_by_stop())
undefined_behavior();
if (PSR.ic)
illegal_operation_fault();
if (PSR.cpl != 0)
privileged_operation_fault(0);
if (GR[ r
2
].nat)
register_nat_consumption_fault(0);
tmp_size = CR[ITIR].ps;
tmp_va = CR[IFA]{60:0};
tmp_rid = RR[CR[IFA]{63:61}].rid;
tmp_va = align_to_size_boundary(tmp_va, tmp_size);
if (is_reserved_field(TLB_TYPE, GR[ r
2
], CR[ITIR]))
reserved_register_field_fault();
if (!impl_check_mov_ifa() &&
unimplemented_virtual_address(CR[IFA], PSR.vm))
unimplemented_data_address_fault(0);
if (PSR.vm == 1)
virtualization_fault();
if (instruction_form) {
tlb_must_purge_itc_entries(tmp_rid, tmp_va, tmp_size);
tlb_may_purge_dtc_entries(tmp_rid, tmp_va, tmp_size);
slot = tlb_replacement_algorithm(ITC_TYPE);
tlb_insert_inst(slot, GR[
r
2
], CR[ITIR], CR[IFA], tmp_rid, TC);
} else { // data_form
tlb_must_purge_dtc_entries(tmp_rid, tmp_va, tmp_size);
tlb_may_purge_itc_entries(tmp_rid, tmp_va, tmp_size);
slot = tlb_replacement_algorithm(DTC_TYPE);
tlb_insert_data(slot, GR[
r
2
], CR[ITIR], CR[IFA], tmp_rid, TC);
}
}
Interruptions:
Machine Check abort Reserved Register/Field fault
Illegal Operation fault Unimplemented Data Address fault
Privileged Operation fault Virtualization fault
Register NaT Consumption fault
Serialization:
For the instruction_form, software must issue an instruction serialization operation
before a dependent instruction fetch access. For the data_form, software must issue a
data serialization operation before issuing a data access or non-access reference
dependent on the new translation.