Intel Itanium 9150M, Manual, Page: 159 / 420

3:150 Volume 3: Instruction Reference
itr
Interruptions:
Machine Check abort Reserved Register/Field fault
Illegal Operation fault Unimplemented Data Address fault
Privileged Operation fault Virtualization fault
Register NaT Consumption fault
Serialization:
For the instruction_form, software must issue an instruction serialization operation
before a dependent instruction fetch access. For the data_form, software must issue a
data serialization operation before issuing a data access or non-access reference
dependent on the new translation.
Notes:
The processor may use invalid translation registers for translation cache entries.
Performance can be improved on some processor models by ensuring translation
registers are allocated beginning at translation register zero and continuing
contiguously upwards.