Intel Itanium 9150M, Manual, Page: 247 / 420

3:238 Volume 3: Instruction Reference
rfi
//instruction set execution.
} else { //return to Itanium instruction set
tmp_IP = CR[IIP] & ~0xf;
slot = CR[IPSR].ri;
if ((CR[IPSR].it && unimplemented_virtual_address(tmp_IP, IPSR.vm))
|| (!CR[IPSR].it && unimplemented_physical_address(tmp_IP)))
unimplemented_address = 1;
if (CR[IFS].v) {
tmp_growth = -CFM.sof;
alat_frame_update(-CR[IFS].ifm.sof, 0);
rse_restore_frame(CR[IFS].ifm.sof, tmp_growth, CFM.sof);
CFM = CR[IFS].ifm;
}
rse_enable_current_frame_load();
}
IP = tmp_IP;
instruction_serialize();
if (unimplemented_address)
unimplemented_instruction_address_trap(0, tmp_IP);
Interruptions:
Privileged Operation fault Unimplemented Instruction Address trap
Virtualization fault
Additional Faults on IA-32 target instructions
IA_32_Exception(GPFault)
Disabled FP Reg Fault if PSR.dfh is 1
Serialization:
An implicit instruction and data serialization operation is performed.