Intel Itanium 9150M, Manual

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Volume 3: Instruction Reference 3:217
probe
probe — Probe Access
Format: (
qp
) probe.r
r
1
=
r
3
,
r
2
regular_form, read_form, register_form M38
(
qp
) probe.w
r
1
=
r
3
,
r
2
regular_form, write_form, register_form M38
(
qp
) probe.r
r
1
=
r
3
,
imm
2
regular_form, read_form, immediate_form M39
(
qp
) probe.w
r
1
=
r
3
,
imm
2
regular_form, write_form, immediate_form M39
(
qp
) probe.r.fault
r
3
,
imm
2
fault_form, read_form, immediate_form M40
(
qp
) probe.w.fault
r
3
,
imm
2
fault_form, write_form, immediate_form M40
(
qp
) probe.rw.fault
r
3
,
imm
2
fault_form, read_write_form, immediate_form M40
Description:
This instruction determines whether read or write access, with a specified privilege
level, to a given virtual address is permitted. In the regular_form, GR
r
1
is set to 1 if the
specified access is allowed and to 0 otherwise. In the fault_form, if the specified access
is allowed this instruction does nothing; if the specified access is not allowed, a fault is
taken.
When PSR.dt is 1, the DTLB and the VHPT are queried for present translations to
determine if access to the virtual address specified by GR
r
3
bits {60:0} and the region
register indexed by GR
r
3
bits {63:61}, is permitted at the privilege level given by
either GR
r
2
bits{1:0} or
imm
2
. If PSR.pk is 1, protection key checks are also performed.
The read or write form specifies whether the instruction checks for read or write access,
or both.
When PSR.dt is 0, a regular_form
probe
uses its address operand as a virtual address
to query the DTLB only, because the VHPT walker is disabled. If the probed address is
found in the DTLB, the regular_form
probe
returns the appropriate value, if not an
Alternate Data TLB fault is raised if psr.ic is 1 or a Data Nested TLB fault is raised if
psr.ic is 0 or in-flight.
When PSR.dt is 0, a fault_form
probe
treats its address operand as a physical address,
and takes no TLB related faults.
A regular_form
probe
to an unimplemented virtual address returns 0. A fault_form
probe
to an unimplemented virtual address (when PSR.dt is 1) or unimplemented
physical address (when PSR.dt is 0) takes an Unimplemented Data Address fault.
If this instruction faults, then it will set the non-access bit in the ISR and set the ISR
read or write bits depending on the completer. The faults generated by the different
forms of the
probe
instruction are shown in Table 2-47 below: