3:224
Volume 3: Instruction Reference
pshr
pshr — Parallel Shift Right
Format:
(
qp
) pshr2
r
1
=
r
3
,
r
2
signed_form, two_byte_form, variable_form
(
qp
) pshr2
r
1
=
r
3
, count
5
signed_form, two_byte_form, fixed_form
(
qp
) pshr2.u
r
1
=
r
3
,
r
2
unsigned_form, two_byte_form, variable_form
(
qp
) pshr2.u
r
1
=
r
3
, count
5
unsigned_form, two_byte_form, fixed_form
(
qp
) pshr4
r
1
=
r
3
,
r
2
signed_form, four_byte_form, variable_form
(
qp
) pshr4
r
1
=
r
3
, count
5
signed_form, four_byte_form, fixed_form
(
qp
) pshr4.u
r
1
=
r
3
,
r
2
unsigned_form, four_byte_form, variable_form
(
qp
) pshr4.u
r
1
=
r
3
, count
5
unsigned_form, four_byte_form, fixed_form
Description:
The data elements of GR
r
3
are each independently shifted to the right by the scalar
shift count in GR
r
2
, or in the immediate field
count
5
. The high-order bits of each
element are filled with either the initial value of the sign bits of the data elements in GR
r
3
(arithmetic shift) or zeros (logical shift). The shift count is interpreted as unsigned.
Shift counts greater than 15 (for 16-bit quantities) or 31 (for 32-bit quantities) yield all
zero or all one results depending on the initial values of the sign bits of the data
elements in GR
r
3
and whether a signed or unsigned shift is done. The results are placed
in GR
r
1
.
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
Page 420: ......