Intel Itanium 9150M, Manual

Page: 200 / 420

Volume 3: Instruction Reference 3:191
mux
For 16-bit elements, all possible permutations, with and without repetitions can be
specified. They are expressed with an 8-bit
mhtype
8
field, which encodes the indices of
the four 16-bit data elements. The indexed 16-bit elements of GR
r
2
are copied to
corresponding 16-bit positions in the target register GR
r
1
. The indices are encoded in
little-endian order. (The 8 bits of
mhtype
8
[7:0] are grouped in pairs of bits and named
mhtype
8
[3],
mhtype
8
[2],
mhtype
8
[1],
mhtype
8
[0] in the Operation section).
Figure 2-27. Mux2 Examples (16-bit elements)
GR r
1
:
GR r
2
:
mux2 r1 = r2, 0x8d (shuffle 10 00 11 01)
GR r
1
:
GR r
2
:
mux2 r1 = r2, 0x1b (reverse 00 01 10 11)
GR r
1
:
GR r
2
:
mux2 r1 = r2, 0xaa (broadcast 10 10 10 10)
GR r
1
:
GR r
2
:
mux2 r1 = r2, 0xd8 (alternate 11 01 10 00)