Volume 3: Pseudo-Code Functions
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3
Pseudo-Code Functions
3
This chapter contains a table of all pseudo-code functions used on the Itanium
instruction pages.
Table 3-1.
Pseudo-code Functions
Function
Operation
xxx
_fault(parameters ...)
There are several fault functions. Each fault function accepts parameters specific to
the fault, e.g., exception code values, virtual addresses, etc. If the fault is deferred for
speculative load exceptions the fault function will return with a deferral indication.
Otherwise, fault routines do not return and terminate the instruction sequence.
xxx
_trap(parameters ...)
There are several trap functions. Each trap function accepts parameters specific to
the trap, e.g., trap code values, virtual addresses, etc. Trap routines do not return.
acceptance_fence()
Ensures prior data memory references to uncached ordered-sequential memory
pages are “accepted” before subsequent data memory references are performed by
the processor.
alat_cmp(rtype, raddr)
Returns a one if the implementation finds an ALAT entry which matches the register
type specified by
rtype
and the register address specified by
raddr
, else returns
zero. This function is implementation specific. Note that an implementation may
optionally choose to return zero (indicating no match) even if a matching entry exists
in the ALAT. This provides implementation flexibility in designing fast ALAT lookup
circuits.
alat_frame_update( delta_bof, delta_sof)
Notifies the ALAT of a change in the bottom of frame and/or size of frame. This allows
management of the ALAT’s tag bits or other management functions it might need.
alat_inval()
Invalidate all entries in the ALAT.
alat_inval_multiple_entries(paddr, size)
The ALAT is queried using the physical memory address specified by
paddr
and the
access size specified by
size
. All matching ALAT entries are invalidated. No value is
returned.
alat_inval_single_entry(rtype, rega)
The ALAT is queried using the register type specified by
rtype
and the register
address specified by
rega
. At most one matching ALAT entry is invalidated. No value
is returned.
alat_read_memory_on_hit(ldtype, rtype,
raddr)
Returns a one if the implementation requires that the requested check load should
perform a memory access (requires prior address translation); returns a zero
otherwise.
alat_translate_address_on_hit(ldtype,
rtype, raddr)
Returns a one if the implementation requires that the requested check load should
translate the source address and take associated faults; returns a zero otherwise.
alat_write(ldtype, rtype, raddr, paddr,
size)
Allocates a new ALAT entry or updates an existing entry using the load type specified
by
ldtype
, the register type specified by
rtype
, the register address specified by
raddr
, the physical memory address specified by
paddr
, and the access size
specified by
size
. No value is returned. This function guarantees that at most only
one ALAT entry exists for a given
raddr
. Based on the load type
ldtype
, if a
ld.c.nc
,
ldf.c.nc
, or
ldfp.c.nc
instruction's
raddr
matches an existing ALAT
entry's register tag, but the instruction's
size
and/or
paddr
are different than that of
the existing entry's, then this function may either preserve the existing entry, or
invalidate it and write a new entry with the instruction's specified
size
and
paddr
.
align_to_size_boundary(vaddr, size)
Returns
vaddr
aligned to the boundary specified by
size
.
branch_predict(wh, ih, ret, target, tag)
Implementation-dependent routine which updates the processor’s branch prediction
structures.
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
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