3:264
Volume 3: Instruction Reference
tf
Operation:
if (PR[qp]) {
if (
p
1
==
p
2
)
illegal_operation_fault();
tmp_rel = (psr.vm && pal_vp_env_enabled() && VAC.a_tf) ?
vcpuid[4]{imm5} : cpuid[4]{imm5};
if (
trel
== ‘z’)
// ‘z’ - test for 0, not 1
tmp_rel = !tmp_rel;
switch (
ctype
) {
case ‘and’:
// and-type compare
if (!tmp_rel) {
PR[
p
1
] = 0;
PR[
p
2
] = 0;
}
break;
case ‘or’:
// or-type compare
if (tmp_rel) {
PR[
p
1
] = 1;
PR[
p
2
] = 1;
}
break;
case ‘or.andcm’:
// or.andcm-type compare
if (tmp_rel) {
PR[
p
1
] = 1;
PR[
p
2
] = 0;
}
break;
case ‘unc’:
// unc-type compare
default:
// normal compare
PR[
p
1
] = tmp_rel;
PR[
p
2
] = !tmp_rel;
break;
}
} else {
if (
ctype
== ‘unc’) {
if (
p
1
==
p
2
)
illegal_operation_fault();
PR[
p
1
] = 0;
PR[
p
2
] = 0;
}
}
Interruptions:
Illegal Operation fault
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
Page 420: ......