Intel Itanium 9150M, Manual

Page: 264 / 420

Volume 3: Instruction Reference 3:255
stf
Operation: if (PR[ qp ]) {
if (imm_base_update_form)
check_target_register( r
3
);
if (tmp_isrcode = fp_reg_disabled( f
2
, 0, 0, 0))
disabled_fp_register_fault(tmp_isrcode, WRITE);
if (GR[ r
3
].nat || (!spill_form && (FR[ f
2
] == NATVAL)))
register_nat_consumption_fault(WRITE);
size = spill_form ? 16 : (integer_form ? 8 : fsz) ;
itype = WRITE;
if (size == 10) itype |= UNCACHE_OPT;
paddr = tlb_translate(GR[ r
3
], size, itype, PSR.cpl, &mattr, &tmp_unused);
val = fp_fr_to_mem_format(FR[ f
2
], size, integer_form);
mem_write(val, paddr, size, UM.be, mattr , UNORDERED, sthint );
alat_inval_multiple_entries(paddr, size);
if (imm_base_update_form) {
GR[ r
3
] = GR[ r
3
] + sign_ext( imm
9
, 9);
GR[ r
3
].nat = 0;
mem_implicit_prefetch(GR[ r
3
], sthint , WRITE);
}
}
Interruptions:
Illegal Operation fault Data NaT Page Consumption fault
Disabled Floating-point Register fault Data Key Miss fault
Register NaT Consumption fault Data Key Permission fault
Unimplemented Data Address fault Data Access Rights fault
Data Nested TLB fault Data Dirty Bit fault
Alternate Data TLB fault Data Access Bit fault
VHPT Data fault Data Debug fault
Data TLB fault Unaligned Data Reference fault
Data Page Not Present fault Unsupported Data Reference fault