Intel Itanium 9150M, Manual

Page: 130 / 420

Volume 3: Instruction Reference 3:121
fpnma
Operation: if (PR[ qp ]) {
fp_check_target_register( f
1
);
if (tmp_isrcode = fp_reg_disabled( f
1
, f
2
, f
3
, f
4
))
disabled_fp_register_fault(tmp_isrcode, 0);
if (fp_is_natval(FR[ f
2
]) || fp_is_natval(FR[ f
3
]) ||
fp_is_natval(FR[ f
4
])) {
FR[ f
1
] = NATVAL;
fp_update_psr( f
1
);
} else {
tmp_default_result_pair = fpms_fpnma_exception_fault_check( f
2
, f
3
,
f
4
, sf, &tmp_fp_env);
if (fp_raise_fault(tmp_fp_env))
fp_exception_fault(fp_decode_fault(tmp_fp_env));
if (fp_is_nan_or_inf(tmp_default_result_pair.hi)) {
tmp_res_hi = fp_single(tmp_default_result_pair.hi);
} else {
tmp_res = fp_mul(fp_reg_read_hi( f
3
), fp_reg_read_hi( f
4
));
tmp_res.sign = !tmp_res.sign;
if (
f
2
!= 0)
tmp_res = fp_add(tmp_res, fp_reg_read_hi( f
2
), tmp_fp_env);
tmp_res_hi = fp_ieee_round_sp(tmp_res, HIGH, &tmp_fp_env);
}
if (fp_is_nan_or_inf(tmp_default_result_pair.lo)) {
tmp_res_lo = fp_single(tmp_default_result_pair.lo);
} else {
tmp_res = fp_mul(fp_reg_read_lo( f
3
), fp_reg_read_lo( f
4
));
tmp_res.sign = !tmp_res.sign;
if (
f
2
!= 0)
tmp_res = fp_add(tmp_res, fp_reg_read_lo( f
2
), tmp_fp_env);
tmp_res_lo = fp_ieee_round_sp(tmp_res, LOW, &tmp_fp_env);
}
FR[ f
1
].significand = fp_concatenate(tmp_res_hi, tmp_res_lo);
FR[ f
1
].exponent = FP_INTEGER_EXP;
FR[ f
1
].sign = FP_SIGN_POSITIVE;
fp_update_fpsr( sf , tmp_fp_env);
fp_update_psr( f
1
);
if (fp_raise_traps(tmp_fp_env))
fp_exception_trap(fp_decode_trap(tmp_fp_env));
}
}
FP Exceptions:
Invalid Operation (V) Underflow (U)
Denormal/Unnormal Operand (D) Overflow (O)
Software Assist (SWA) fault Inexact (I)
Software Assist (SWA) trap
Interruptions:
Illegal Operation fault Floating-point Exception fault
Disabled Floating-point Register fault Floating-point Exception trap